What This Document Is
This is an assignment for EE 357: Basic Organization of Computer Systems, offered at the University of Southern California. Specifically, it’s Homework 2, designed to assess your understanding of fundamental concepts in computer architecture. The assignment focuses on the Instruction Set Architecture (ISA) – the core interface between hardware and software – and how it impacts program execution. It also delves into addressing modes and data representation within a computing system. The assignment requires submitting answers directly on Blackboard, adhering to specified formatting guidelines.
Why This Document Matters
This assignment is crucial for students enrolled in EE 357 who are building a foundation in computer systems. Successfully completing this work will solidify your grasp of how instructions are structured and executed, how memory is addressed, and how data is manipulated at a low level. It’s particularly beneficial to work through this assignment *after* covering the related lecture material and readings, as it provides practical application of those concepts. It’s designed to prepare you for more advanced topics in the course, such as processor design and performance analysis.
Common Limitations or Challenges
This assignment focuses on theoretical understanding and application of concepts, but it doesn’t provide a comprehensive overview of all possible ISAs or addressing modes. It requires independent problem-solving and the use of software tools (Codewarrior) to analyze program execution. The assignment assumes a basic familiarity with hexadecimal notation and bitwise operations. It does not offer step-by-step solutions or detailed explanations of every concept; rather, it challenges you to apply your knowledge.
What This Document Provides
* A series of True/False questions testing your understanding of ISA principles.
* Problems requiring you to calculate address space sizes based on processor address bus widths.
* A coding exercise involving assembly language programming and register/memory analysis.
* Questions focused on different addressing modes and their functionalities.
* A series of instruction sequences to analyze, determining effective addresses and register values.
* A section requiring translation of C variable declarations into appropriate data and space directives.
