What This Document Is
This document presents a detailed research study focused on the numerical simulation of a critical process in semiconductor manufacturing: back grinding of silicon wafers. It’s a technical paper originating from research conducted at the University of Idaho, involving collaboration with Micron Technologies Inc. The work utilizes advanced computational methods to analyze the mechanics of material removal during wafer thinning. It’s geared towards an advanced understanding of the process, going beyond purely experimental or analytical approaches.
Why This Document Matters
This study is particularly valuable for graduate students and researchers in Electrical Engineering, Mechanical Engineering, and Materials Science, specifically those specializing in microfabrication, semiconductor processing, or related fields. It’s also relevant for engineers working directly in wafer manufacturing or packaging who seek a deeper understanding of the underlying physics governing the back grinding process. This resource can be used to supplement coursework, inform research projects, or provide insights into optimizing manufacturing parameters.
Topics Covered
* Finite Element Analysis (FEA) applied to material removal processes
* Silicon wafer back grinding mechanics
* Residual stress analysis in semiconductor materials
* Micro-scale modeling of abrasive processes
* Correlation of numerical simulations with experimental data (Raman spectroscopy)
* Optimization of grinding parameters for improved wafer reliability
* Material behavior under high strain rates and plastic deformation
* The impact of wafer thickness on electronic package design
What This Document Provides
* A detailed description of a numerical model developed using ABAQUS Explicit.
* An investigation into the relationship between grinding parameters and induced stresses within the silicon wafer.
* A comparative analysis between simulation results and experimental measurements.
* Insights into the formation of shear bands during the grinding process.
* A framework for understanding the local conditions experienced by wafers during back grinding.
* A foundation for further research into advanced wafer thinning techniques.
