What This Document Is
This document is a completed lab assignment – specifically, Lab 4 for CSE 120: Digital Design Fundamentals at Arizona State University. It details a student’s work on building and testing components of a microprocessor, including memory address generation, controller circuits, and a complete microprocessor design. The assignment was completed by Dhruv Bansal for Dr. Steven Millman’s T & Th 3:00-4:15 pm class on April 6, 2023.
Why This Document Matters
This lab report serves as a record of a student’s practical application of digital logic design principles. It’s valuable for students taking the same course as a reference for completed work, potential troubleshooting insights, and understanding expected outcomes. Instructors can use it as a sample student submission.
Common Limitations or Challenges
This document represents *one* student’s approach and results. It doesn’t provide instruction on *how* to complete the lab, nor does it offer comprehensive explanations of the underlying digital design concepts. It’s a demonstration of completion, not a teaching tool.
What This Document Provides
The full document includes:
* Screenshots of Digital circuit designs for the memory-address-generation circuit, two-bit mux, two-bit register, controller circuit, and the complete microprocessor.
* Student reflections on challenges faced during the design and simulation phases of each task.
* Waveform visualizations from Verilog simulations.
* Answers to specific questions posed in the lab assignment regarding circuit behavior and encountered issues.
This preview *does not* include the actual Digital (.dig) or Verilog (.v) files, detailed explanations of the design process, or a comprehensive analysis of the circuits’ functionality. It only provides a high-level overview of the completed assignment.