What This Document Is
This is a detailed assignment description for Phase I of the Fall 2009 term project in ELENG 141, Introduction to Digital Integrated Circuits at UC Berkeley. It outlines the initial tasks for students working in teams to design a programmable functional unit. The assignment focuses on foundational aspects of digital circuit design, specifically relating to memory and arithmetic operations. It serves as a guide for students to begin a multi-phase project involving practical implementation and simulation using industry-standard tools.
Why This Document Matters
This document is essential for students enrolled in ELENG 141 who are undertaking the term project. It clarifies expectations, outlines deliverables, and provides the necessary context for the first stage of a significant design endeavor. Students will benefit from carefully reviewing this assignment before commencing work, as it details the specific skills and knowledge they will be expected to demonstrate. It’s particularly valuable for those seeking a hands-on understanding of SRAM cell behavior and address decoder design.
Topics Covered
* SRAM Cell Characterization
* Static Noise Margin (SNM) Analysis
* Address Decoder Design Principles
* Digital System Building Blocks (Adders, Memory Arrays)
* Cadence and HSPICE Simulation Tools
* Technology Constraints (90nm process)
* Functional Unit Architecture
What This Document Provides
* A high-level block diagram of the functional unit to be designed.
* Detailed instructions for accessing and utilizing pre-designed SRAM cell libraries within Cadence.
* Specific guidance on performing simulations using HSPICE to evaluate cell stability.
* A clear timeline and due date for Phase I deliverables.
* An overview of the project’s overall goals and its division into three distinct phases.
* Information on the necessary software and technology libraries required for completion.
