What This Document Is
This document serves as a focused guide to utilizing specific tools within the Synopsys suite for VLSI Digital System Design, as part of the CMPE 222 course at the University of California, Santa Cruz. It details the necessary setup and preparatory steps required to effectively employ these industry-standard software packages in your design workflow. The material centers around configuring your computing environment for successful implementation of digital system designs.
Why This Document Matters
This resource is essential for students enrolled in VLSI design courses, or anyone seeking to gain practical experience with industry-leading Electronic Design Automation (EDA) tools. It’s particularly valuable when you’re beginning a new project and need to ensure your software environment is correctly configured before starting the design, simulation, or optimization phases. Understanding these initial setup procedures will save significant time and frustration during the development process.
Topics Covered
* Unix Shell Environments (C Shell & Bourne Shell)
* Synopsys Toolchain Setup and Configuration
* HDL Design Preparation (Verilog & VHDL)
* Directory Structure and File Management for Projects
* Design Compiler Setup and Configuration Files
* Virtual System Simulation (VSS) Setup
* Library Management and Search Paths
* Understanding Technology Libraries
What This Document Provides
* Detailed instructions for modifying shell configuration files.
* Guidance on creating essential setup files for Synopsys tools.
* Explanations of key parameters within setup files, such as search paths and library definitions.
* Information on preparing your HDL design for optimal performance with the tools.
* A foundational understanding of how to manage design libraries and associated files.
* Contextual information regarding potential software compatibility issues.