What This Document Is
This document is a laboratory guide for students enrolled in a Fundamentals of Robot Kinematics and Dynamics course (CMPE 10) at the University of California, Santa Cruz. Specifically, Lab 2 focuses on the foundational principles of combinational logic synthesis – the process of designing and creating digital circuits from specified logical requirements. It bridges theoretical knowledge with practical application, utilizing both traditional discrete logic techniques and modern programmable logic devices (PLDs).
Why This Document Matters
This lab guide is essential for students seeking a hands-on understanding of how digital logic functions are implemented in hardware. It’s particularly valuable for those preparing to work with more complex digital systems, as it establishes core skills in circuit design, simulation, and verification. Students will benefit from this resource during the lab session itself, and as a reference when completing related assignments or studying for assessments. It’s designed to reinforce concepts learned in lectures and provide a practical context for understanding digital logic.
Topics Covered
* Combinational Logic Design Principles
* Discrete Logic Implementation using standard ICs
* Programmable Logic Device (PLD) fundamentals, specifically Field Programmable Gate Arrays (FPGAs)
* Logic Synthesis from Truth Tables
* Circuit Simulation and Verification
* Use of CAD tools for PLD development (Altera Quartus II)
* Experimental Circuit Construction and Troubleshooting
* Verification of Logic States using various methods
What This Document Provides
* A detailed description of the lab’s objectives and scope.
* References to supplementary materials for deeper understanding.
* Guidance on constructing circuits using both discrete logic and FPGAs.
* A recommended procedure for completing the lab exercises.
* Instructions for obtaining verification of understanding from the teaching assistant.
* Information on utilizing the Altera development board and its components.
* An overview of the differences between CPLD and FPGA technologies.
